San Francisco paper
Tech and design

Research engineer, chip design RL

AnthropicSan Francisco

As printed
  • Pay$500,000–850,000 per year
  • WhereSan Francisco
  • WorkHybrid
  • TermsFull-time
  • ReferenceRef. 7897
  • In the paper untilThu 19 Nov

Skills and tools

  • ASIC design
  • FPGA design
  • RTL
  • UVM
  • Formal methods
  • EDA tools
  • Synthesis
  • Place-and-route
  • Timing closure
  • PPA optimization

You’ll need

  • Bachelor's degree

Perks

  • Equity donation matching
  • Paid time off
  • Parental leave
  • Flexible hours

About the job

Hybrid, at least 25% in an office. For chip-design experts with ASIC or FPGA experience, including RTL, verification, or physical design. Bachelor's degree or equivalent. Equity donation matching, paid time off, parental leave, and flexible hours.

This is our short summary. Read the full posting on boards.greenhouse.io.

Found on boards.greenhouse.io. Not placed by the employer; applications go to the original posting.

Is this your job? Claim it
Report this ad
What’s wrong?